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| 1/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. serial-in / parallel-out driver series serial / parallel 4-input drivers bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs description serial-in-parallel-out driver incorporates a built-in shift regi ster and a latch circuit to control a maximum of 24 led by a 4- line interface, linked to a microcontroller. a single external resistor can set the output current value of the constant current up to a maximum of 50ma. (bd7851fp only) cmos open drain output type products c an drive the maximum current of 25ma. features 1) led can be driven directly. 2) parallel output of a maximum of 24 bit 3) operational on low voltage (2.7v to 5.5v) 4) cascade connection is possible (bu2050f and bu2092f,bu2092fv are not acceptable) application for av equipment such as, audio stereo sets, videos and tv sets, pcs, control microcontroller mounted equipment. product line-up parameter bu2050f bu2092f bu2092fv bu2099fv bd7851fp bu2152fs unit output current 25 25 25 25 50 25 ma output line 8 12 12 12 16 24 line output type cmos open drain constant current cmos - package sop14 sop18 ssop-b20 ssop-b20 hsop25 ssop-a32 - no.09051eat03
bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 2/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. thermal derating curve absolute maximum ratings (ta=25 ) parameter symbol limits unit bu2050f bu2092f bu2092fv power supply voltage v dd -0.3 to +7.0 -0.3 to +7.0 v power dissipation 1 pd1 450 * 1 450 (sop) * 2 400 (ssopb) * 3 mw power dissipation 2 pd2 - 550 (sop) * 4 650 (ssopb) * 5 mw input voltage v in v ss -0.3 to v dd +0.5 v ss -0.3 to v dd +0.3 v output voltage vo v ss -0.3 to v dd +0.5 v ss to +25.0 v operating temperature topr -40 to +85 -25 to +75 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 3/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. electrical characteristics bu2050f (unless otherwise noted, ta=25 bu2092f/bu2092fv (unless otherwise noted, ta=25 bu2099fv (unless otherwise noted, ta=25 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 4/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. electrical characteristics bd7851fp (unless otherwise noted, ta=25 ? ? ? ? ? ? ? ? bu2152fs (unless otherwise noted, ta=25 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 5/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. block diagram bu2050f bu2092f/bu2092fv bu2099fv bd7851fp bu2152fs controller shift register stb clr clock dat a 8bit l a t c h write buffer p1 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 6/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. operating description (1) data clear when the reset terminal (clr, clb) is set to ?l?, the content of all latch circuits are set to ?h?, and all parallel outputs ar e initialised. (for model with reset terminal only) (2) data transfer serial data is sequentially input to the shift register during the rise of the clock time (strobe signal is not active). when the strobe signal is active, the c ontent of the shift register are transferred to the latch circuit. (3) cascade connection serial input data is output from the serial output thr ough the shift register, regar dless of the strobe signal. (except for bu2050f, bu2092f/bu2092fv) application circuit fig. 1 interfaces bu2050f bu2050f bu2092f/bu2092fv bu2092f/bu2092fv data, clock, stb, clr p1 mpu c1 (*) (*c1 must be placed as close to the terminal as possible.) vdd serial data input clock input strobe input latch input serial data outpu t input gnd(vss) gnd(vss) v dd gnd(vss) v dd output gnd(vss) in gnd(vss) gnd(vss) v dd v dd out gnd(vss) gnd(vss) v dd out out gnd(vss) vss v dd v dd vss vss gnd(vss) v dd v dd v dd gnd(vss) gnd(vss) gnd(vss) v dd v dd gnd(vss) v dd gnd(vss) gnd(vss) v dd gnd(vss) v dd gnd(vss) v dd in (only oe pin) bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 7/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2050f pin descriptions pin no. pin name function 1 p3 parallel data output 2 p4 3 p5 4 v ss gnd 5 p6 parallel data output 6 p7 7 p8 8 data serial data input 9 clk clock signal input 10 stb strobe signal input in case of ?l?, the data of shift register outputs. in case of ?h?, all parallel outputs and data of latch circuit do not change. 11 clr reset signal input in case of ?l?, the data of latch circuit reset, and all parallel output (p1 timing chart fig. 2 1. after the power is turned on and the voltage is stabilized, st b should be activated, after clocking 8 data bits into the data pin. 2. pn parallel output data of the sh ift register is set after the 8 th clock by the stb. 3. since the stb is level latch, data is retained in t he ?l? section and renewed in the ?h? section of the stb. ? ? bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 8/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. switching characteristics (unless otherwise specified, v dd =4.5 to 5.5v, ta=25 ) parameter symbol limit unit condition min. typ. max. set up time (data-clk) t sd 20 - - ns - hold time (data-clk) t hd 20 - - ns - set up time clk) stb( ? ? ? ? ? switching time test waveform fig. 3 clk data p8 p1 stb clr 1 2 8 9 10 11 12 f max t hd t sd t hstb t sstb t pdpstb t pdpcl r t pdpck bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 9/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2092f/bu2092fv pin descriptions timing chart fig. 4 1. after the power is turned on and the voltage is stabilized, lck should be activated, after clocking 12 data bits into the data terminal. 2. qx parallel output data of the sh ift register is set after the 12 th clock by the lck. 3. since the lck is a label latch, data is retained in t he ?l? section and renewed in the ?h? section of the lck. 4. data retained in the internal latch circuit is output when the oe is in the ?l? section. bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 10/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. switching characteristics (unless otherwise specified, v dd =5v, v ss =0v, ta=25 ) parameter symbol limit unit condition min. typ. max. v dd (v) minimum clock pulse width t w 1000 - - ns 3 - 500 - - ns 5 minimum latch pulse width (lck) t w (lck) 1000 - - ns 3 - 500 - - ns 5 setup time (lck ? ? ? ? switching time test circuit fig. 5 clock pulse gen. data pulse gen. q11 r l bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 11/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2092f/bu2092fv switching time test waveforms fig. 6 clock data t su 90% 10% 90% 90% t h 90% 90% 10% 90% 10% t w t w 50% lck 50% 90% 10% t s 90% t w (clk) 50% 50% oe qx t plz (lck) t pzl (lck) 10% 50% 10% t plz 50% t pzl v dd gnd ( vss ) v dd gnd ( vss ) v dd gnd ( vss ) v dd gnd ( vss ) v dd gnd ( vss ) bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 12/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2099fv pin descriptions pin no. pin name i/o function 1 v ss - gnd 2 n.c. - non connected 3 data i serial data input 4 clock i shift clock of shift register (rising edge trigger) 5 lck i latch clock of storage register (rising edge trigger) 6 timing chart fig. 7 1. after the power is turned on and the voltage is stabilized, lck should be activates, after clocking 12 data bits into the data terminal. 2. qx parallel output data of the shift register is set after the 12 th clock by the lck. 3. since the lck is a label latch, data is retained in the ?l? section and renewed in the ?h? section of the lck. 4. data retained in the internal latch circuit is output when the oe is in the ?l? section. 5. the final stage data of the shift register is output to the so by synchronizing with the rise time of the clock. bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 13/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2099fv switching characteristics (unless otherwise specified, v dd =5v, v ss =0v, ta=25 ) parameter symbol limit unit condition min. typ. max. v dd (v) minimum clock pulse width (clock) t w 1000 - - ns 3 - 500 - - ns 5 minimum latch pulse width (lck) t w (lck) 1000 - - ns 3 - 500 - - ns 5 setup time (lck ? ? ? ? input voltage test circuit switching time test circuit ? bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 14/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2099fv output voltage test circuit fig. 10 switching time test waveforms fig. 11 vdd gnd (vss) p. g. gnd (vss) gnd (vss) gnd (vss) gnd (vss) gnd (vss) gnd (vss) i ol2 i oh sw4 1 2 test condition v ol1 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 15/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bd7851fp pin descriptions pin no. pin name function 1 gnd ground 2 r_iref reference current output current setting 3 latch latch signal input 4 s_in serial data input 5 timing chart fig. 12 1. after the power is turned on and the voltage is stabilized, latch should be activated, after clocking 16 data bits into the s_in terminal. 2. outn parallel output data of the shift register is set after the 16 th clock by the latch. 3. the final stage data of the shift register is outputted to the sout by synchronizing with the rise time of the clock. 4. since the latch is a label latch, data is retained in the ?l? section and renewed in the ?h? section of the latch. 5. data retained in the internal latch circuit is outputted when the enable is in the ?l? section. when the enable is in the ?h? section, data is fixed in the ?h? section. clock latch s_in data16 data15 data14 data2 data1 outn previous data data sout previous data15 previous data14 previous data2 data16 previous data1 data15 data14 enable bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 16/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bd7851fp timing characteristics (unless otherwise specified, v cc =5v, ta=25 ) parameter symbol limit unit condition min. typ. max. frequency clock fclk - - 10 mhz pulse width clock t wh 20 50 - ns clock pulse width latch t wh 40 50 - ns latch pulse width enable t w 30 - - ns enable rise time / fall time t r / t f - 30 100 ns clock setup time t su 30 50 - ns s_in-clock 30 50 - latch-clock hold time t h 30 50 - ns s_in-clock 30 50 - latch-clock rise time t r - 300 - ns outn - - 50 sout fall time t f - 300 - ns outn - - 50 sout propagation t plh - 400 650 ns clk-sout, latch enable-outn t phl - 300 400 clk-sout, latch enable-outn reference current of output current r_iref-vout bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 17/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bd7851fp test circuit 1 fig. 15 test circuit 2 ? ? bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 18/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bd7851fp switching time test waveforms fig. 17 clock t su 0.2 ? ? ? bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 19/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2152fs pin descriptions pin no. pin name i/o function 1 v ss - ground 2 clk i clock input 3 v ss - ground 4 data i serial data input 5 timing chart fig. 18 1. after the power is turned on and the voltage is stabilized, stb should be activated, after clocking 24 data bits into the data terminal. 2. pn parallel output data of the shift register is set after the 24 th clock by the lck. 3. since the stb is a label latch, data is retained in the ?h? section and renewed in the ?l? section of the stb. 4. the final stage data of the shift register is outputted to the so by synchronizing with the rise time of the clock. bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 20/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. bu2152fs switching characteristics (unless otherwise specified, v dd =2.7 to 5.5v, v ss =0v, ta=25 ) parameter symbol limit unit condition min. typ. max. maximum clock frequency f max 5 - - mhz setup time 1 t su1 20 - - ns data-clk hold time 1 t hd1 20 - - ns clk-data setup time 2 t su2 30 - - ns stb-clk hold time 2 t hd2 30 - - ns clk-stb setup time 3 t su3 30 - - ns clb-clk hold time 3 t hd3 30 - - ns clk-clb setup time 4 t su4 30 - - ns stb-clb hold time 4 t hd4 30 - - ns clb-stb output delay time 1* t pd1 - - 100 ns clk-p1 bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 21/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. switching characteristic conditions bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 22/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. notes for use 1. absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify br eaking mode, such as a short circuit or an open circuit. if any over rated values will expect to exceed the absolute maximum ra tings, consider adding circuit protection devices, such as fuses. 2. connecting the power supply connector backward connecting of the power supply in reverse polarity can da mage ic. take precautions when connecting the power supply lines. an external direction diode can be added. 3. power supply lines design pcb layout pattern to provide low impedance gnd and supply lines. to obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. furthermore, for all power supply terminals to ics, connect a capacitor between the power supply and the gnd term inal. when applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. 4. gnd voltage the potential of gnd pin must be minimum potential in all operating conditions. 5. thermal design use a thermal design that allows for a sufficient margin in light of the power dissipation (pd) in actual operating conditions. 6. inter-pin shorts and mounting errors use caution when positioning the ic for mounting on printed circuit boards. the ic may be damaged if there is any connection error or if pins are shorted together. 7. actions in strong electromagnetic field use caution when using the ic in the presence of a strong electromagnetic field as doing so may cause the ic to malfunction. 8. testing on application boards when testing the ic on an application board, connecting a capacitor to a pin with low impedance subjects the ic to stress. always discharge capacitors after each process or step. always turn the ic's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. ground the ic during assembly steps as an antistatic measure. use similar precaution when transporting or storing the ic. 9. ground wiring pattern when using both small signal and large current gnd patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations cause d by large currents do not cause variations in the small signal ground voltage. be careful not to change the gnd wiring pattern of any external components, either. 10. unused input terminals connect all unused input terminals to vdd or vss in or der to prevent excessive current or oscillation. insertion of a resistor (100k ? bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 23/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. ordering part number b u 2 0 9 2 f v - e 2 part no. part no. 2050 2092 2099 7851 2152 package f : sop14 : sop18 fv : ssop-b20 fp : hsop25 fs : ssop-a32 packaging and forming specification e2: embossed tape and reel (unit : mm) sop14 7 14 1.27 0.11 1 8 0.3min 8.7 0.2 0.4 0.1 0.15 0.1 1.5 0.1 6.2 0.3 4.4 0.2 (max 9.05 include burr) 0.1 ? order quantity needs to be multiple of the minimum quantity. bu2050f,bu2092f,bu2092fv,bu2099fv,bd7851fp,bu2152fs technical note 24/24 www.rohm.com 2009.06 - rev.a ? 2009 rohm co., ltd. all rights reserved. ? order quantity needs to be multiple of the minimum quantity. r0039 a www.rohm.com ? 2009 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specified in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law. |
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